Memory modules are one of the most widely used electronic components. Personal computers (PC's) and other electronic systems often use small printed-circuit board (PCB) daughter cards known as memory modules instead of directly mounting individual memory chips on a motherboard. The memory modules are constructed to meet specifications set by industry-standard groups, thus ensuring a wide potential market. High-volume production and competition have driven module costs down dramatically, benefiting the electronics buyer.
Memory modules are made in many different sizes and capacities, such as older 30-pin and 72-pin single-inline memory modules (SIMMs) and newer 168-pin, 184-pin, and 240-pin dual inline memory modules (DIMMs). The “pins” were originally pins extending from the module's edge, but now most modules are leadless, having metal contact pads or leads. The modules are small in size, being about 3-5 inches long and about an inch to an inch and a half in height.
The memory modules contain a small printed-circuit board substrate, typically a multi-layer board with alternating laminated layers of fiberglass insulation and foil or metal interconnect layers. Surface mounted components such as DRAM chips, buffer chips, and capacitors are soldered onto one or both surfaces of the substrate.
FIG. 1 shows a memory module. Memory module 10 contains a substrate such as a multi-layer printed-circuit board (PCB) with surface-mounted DRAM chips 22 mounted to the front surface or side of the substrate, as shown in FIG. 1, while more DRAM chips 22 are mounted to the back side or surface of the substrate (not shown). Memory module 10 could be a fully-buffered dual-inline memory module (FB-DIMM) that is fully buffered by Advanced Memory Buffer (AMB) 24 on memory module 10. Some other kinds of memory modules do not have AMB 24, or have other kinds of buffers.
Metal contact pads 12 are positioned along the bottom edge of the module on both front and back surfaces. Metal contact pads 12 mate with pads on a module socket to electrically connect the module to a PC's motherboard. Holes 16 are present on some kinds of modules to ensure that the module is correctly positioned in the socket. Notches 14 also ensure correct insertion of the module. Capacitors or other discrete components are surface-mounted on the substrate to filter noise from the DRAM chips 22.
Memory modules are produced in high volumes, and there are many manufacturers of memory modules. Since memory modules have become a commodity, pricing of memory modules is critical to a manufacturer's success or failure. Manufacturers need to keep costs down. Costs include the cost of making DRAM chips, module parts and assembly, and testing. Testing costs currently add 10 cents to one dollar to the cost of each DRAM chip, and a memory module may contain 8 or more DRAM chips.
To improve reliability, burn-in testing is sometimes performed. DRAM chips can be heated and have higher power-supply voltages (Vcc) applied to stress the DRAM chips and speed up the occurrence of failures. The passing DRAM chips are less likely to fail and thus have higher reliability, as do memory modules made from these pre-stressed DRAM chips. Unfortunately, such burn-in testing also increases manufacturing costs.
FIG. 2 is a flow chart of a prior-art burn-in test flow for making memory modules. DRAM chips are made in a wafer fab and are packaged, perhaps after wafer-sort testing of the die. These packaged DRAM chips are received by a memory-module manufacturer, step 202. An initial D.C. test of these packaged DRAM chips is performed, step 204. This initial D.C. test can check for opens, shorts, excessive power drain, and some basic functional testing may also be included.
DRAM chips that pass the initial D.C. test are inserted into test sockets on a memory-chip burn-in board, step 206. The memory-chip burn-in boards are placed in a burn-in oven, and the DRAM chips are heated over a period of time. Stress voltages may also be applied during burn-in.
After the burn-in time period, the memory-chip burn-in boards are removed from the burn-in oven, step 208, and individual DRAM chips are extracted from sockets on the memory-chip burn-in board. The DRAM chips are tested more extensively using a full functional test that writes and reads all memory locations on each DRAM chip, perhaps with several test patterns, step 210. This testing is likely performed on an expensive ATE tester, and the functional tests take some time, increasing test costs.
The DRAM chips may be heated or cooled during functional testing, and the applied voltages may be changed to higher and lower values such as +/−10% during testing, step 212. Steps 210 and 212 could be performed at the same time on the same tester, or could be separate tests requiring separate insertions into the tester.
DRAM chips that pass the functional tests after burn-in are reliable chips and can be used to make reliable memory modules. Passing DRAM chips are soldered to module substrate boards to assemble memory modules, step 214. Once the memory modules are assembled, the modules may be tested, step 216, to screen for faulty solder connections.
FIG. 3 illustrates a prior-art burn-in test flow for making memory modules. DRAM dice are made in a factory or wafer fab and are tested and packaged as DRAM chips 22. Some wafer-sort testing may be performed to determine which die to package and which die to discard.
Packaged DRAM chips 22 are initially tested by being placed into test socket 108, which connects to ATE test head 102 of an automated-test-equipment (ATE). ATE testers are very expensive, typically being million-dollar machines. DRAM chips 22 that pass testing on ATE test head 102 are inserted into test sockets on memory-chip burn-in board 106. Once populated with many DRAM chips 22, memory-chip burn-in board 106 is inserted into burn-in oven 104 for several hours, days, or weeks of applied stress.
A stress voltage may be applied to the power-supply or other pins of DRAM chips 22 by memory-chip burn-in board 106 while inside burn-in oven 104. This allows DRAM chips 22 to be stressed by both high heat and high voltage, such as 125 degrees C. and 5.5 volts. Applied voltages to signal pins may be toggled high and low for added stress.
After a period of time in burn-in oven 104, memory-chip burn-in board 106 is removed from burn-in oven 104 and DRAM chips 22 are removed from test sockets on memory-chip burn-in board 106. DRAM chips 22 are then tested again on ATE test head 102, and failing chips are discarded. If the period of time in burn-in oven 104 is sufficiently long, failures known as infant mortalities can be screened out, increasing reliability of the remaining DRAM chips 22.
DRAM chips 22 that pass the post-burn-in test on ATE test head 102 are soldered to substrate boards during assembly of memory module 10. Memory modules may then be tested, either on ATE test head 102 or on another tester, and shipped to customers.
A single memory module may contain several DRAM chips, such as 8 or more DRAM chips per module. Each of these 8 or more DRAM chips 22 must be inserted into test sockets on memory-chip burn-in board 106 before insertion into burn-in oven 104, and each of the 8 or more DRAM chips 22 must be removed from these test sockets on memory-chip burn-in board 106 after removal from burn-in oven 104. Inserting and removing DRAM chips into test sockets on memory-chip burn-in board 106 may be performed manually, which is tedious and time consuming.
A disadvantage of this burn-in process is that each memory module with 8 DRAM chips requires 8 insertions and 8 removals, or a total of 16 insertion/removal steps per module with 8 DRAM chips. A human operator likely can only insert or remove one DRAM chip at a time.
What is desired is a manufacturing method and test flow that is more efficient. A burn-in test flow that reduces the number of insertions/removals per memory module is desirable. A test flow with reduced test cost is also desired. Testing using less expensive testers than million-dollar ATE test machines is also desired.